Ferroelectric Hafnia Superlattices for Bio-Inspired Computing

Abstract

Artificial Intelligence excels at learning and predicting: from the diagnosis an anomaly in an electrocardiogram to the detection of a collision risk by a car, many applications require always faster reactions. However, deploying AI in our society without compromising our greenhouse gas emissions goals requires the adoption of disruptive, energy-efficient solutions. In this context, neuromorphic systems aim at mimicking the brain in the way it processes information. At IBM Research Zurich, ferroelectric materials are investigated for the fabrication of synaptic weights for in-memory deep neural networks and as well as synapses for spiking neural networks. We developed a CMOS-compatible process for the fabrication of passive crossbar arrays[1], combining ferroelectric $HfZrO_4$ “solid solution” (HZO) with $WO_x$. In the two-terminals configuration, the current flows through the ferroelectric material, which makes the synaptic weights’ electrical operation challenging. First, switching the ferroelectric polarization might require relatively large voltages, making their circuit integration difficult and increasing the required power. Second, the small conductivity of the devices requires them to occupy a large footprint in order to achieve measurable currents. By stabilizing ferroelectricity in ultra-thin HZO films below $3 nm^{[2]}$, we achieved sub-volt programming and reduced by 4 orders of magnitude the footprint compared to 5 nm thick $films^{[3]}$. However, such scaled devices required a high crystallization temperature (500°C) and exhibited a limited On/Off ratio (<2). With the objective of controlling topological features such as non-trivial domain walls to add novel functionalities, we explored the combination of ferroelectric $HfO_2$ and anti-ferroelectric $ZrO_2$ in (HZO-SL) superlattices by Atomic Layer Deposition. In this talk, we provide recent advances on the electrical characterization of devices based on such thin films. The HZO-SL require a reduced thermal budget for crystallization, and a reduced footprint compared to HZO, while demonstrating a larger On/Off ratio of 16. Thanks to these properties, we demonstrate the CMOS co-integration of the HZO-SL devices in the Back-End-Of-Line. [1] L. Bégon-Lours, M. Halter, F. M. Puglisi, L. Benatti, D. F. Falcone, Y. Popoff, D. D. Pineda, M. Sousa, B. J. Offrein, Adv. Electron. Mater. 2022, 2101395. [2] L. Bégon-Lours, M. Halter, M. Sousa, Y. Popoff, D. D. Pineda, D. F. Falcone, Z. Yu, S. Reidt, L. Benatti, F. M. Puglisi, B. Offrein, Neuromorphic Comput. Eng. 2022, 2, DOI 10.1088/2634-4386/ac5b2d. [3] L. Begon-Lours, M. Halter, Y. Popoff, Z. Yu, D. F. Falcone, D. Davila, V. Bragaglia, A. La Porta, D. Jubin, J. Fompeyrine, B. J. Offrein, IEEE J. Electron Devices Soc. 2021, 9, 1275. This work is supported by BeFerroSynaptic (871737), CHIST-ERA, UNICO (No. 20CH21-186952), ALMOND (SNF 198612) and the BRNC.