MRS Spring Meeting 2023

Conductive-TaOx/HfOx Based RRAM Devices with Enhanced Properties for Training Deep Neural Networks

View publication


With the end of Moore’s law approaching and the surge in compute effort required by Artificial Intelligence (AI), the quest for alternative computing schemes to the Von-Neumann architecture has intensified. In this context, in-memory computing is emerging as a promising hardware solution to improve both speed and energy efficiency [1]. By using analogue memory elements arranged in a crossbar array, we enable a fast and massively parallel computation of Vector-Matrix-Multiplications (VMM), the most called on algebraic operation in AI. Executing VMMs directly in analogue hardware enables enhanced power-efficiency compared to today’s conventional computing approach based on highly advanced, digital Complementary Metal-Oxide-Semiconductor (CMOS) technologies. For the analogue alternative to be successful, it must embed memory elements with low programming and reading energy, which translates into requirements such as low-conductance, fast resistive-switching dynamics, and low operating voltages. At the same time, many other fundamental properties such as unit cell area scalability, programming endurance and multi-state retention must be evaluated. In this work we present RRAM devices based on an oxide bilayer structure of TaOx/HfOx, sandwiched between TiN electrodes. The bilayer structure improves the resistive switching symmetry, stochasticity and graduality. At the same time, with the TaOx resistivity being orders of magnitude lower compared to the HfOx, the forming voltage does not increase excessively compared to the baseline case of an oxide monolayer only. By developing an ultrathin 4nm defective-rich HfOx material by ALD, we achieve forming voltages of ~4 V for $ (200 nm)^{2} $ devices, improving by more than 20% this specific compared to the previous generation of bilayer RRAMs (Gen_1) [2]. The reduction of the forming voltages enables a better control of the filament, leading to a ~10x lower conductance of the devices compared to Gen_1. Our colleagues working on deep learning solutions for networks of memristors have recently developed the “Tiki-Taka” algorithm, relaxing the requirements on the conductance updates symmetry and linearity [3]. For the algorithm to accurately train a network of memristors, we update their conductive states by a train of either positive or negative voltage pulses, with fixed amplitude and duration. We successfully demonstrate the Tiki-Taka’s “symmetrization procedure” on our devices, which is an essential step for the correct execution of the algorithm. This procedure requires analogue and non-volatile bidirectional tunability of the device conductance. Both properties are excellently met by our new generation of TaOx/HfOx devices. References [1] Ielmini, Daniele, and H-S. Philip Wong. "In-memory computing with resistive switching devices." Nature electronics 1.6 (2018): 333-343. [2] Stecconi, Tommaso, et al. "Filamentary TaOx/HfO2 ReRAM Devices for Neural Networks Training with Analog In-Memory Computing." Advanced Electronic Materials (2022): 2200448 [3] Gokmen, Tayfun, and Wilfried Haensch. "Algorithm for training neural networks on resistive device arrays." Frontiers in Neuroscience 14 (2020): 103