Subhankar Pal, Aporva Amarnath, et al.
HPCA 2025
Heterogeneous systems-on-chips (SoCs) for real-time applications integrate CPUs and/or GPUs with accelerators to meet application deadlines under strict power/area constraints. The large design space of these systems necessitates efficient SoC-level design space exploration (DSE). Existing static approaches struggle to find SoCs that satisfy all constraints, rendering them unsuitable for real-time applications. We propose the use of dynamic scheduling techniques to significantly reduce the design space and navigate it efficiently. Our proposal outperforms existing methodologies with 5.3-12.8x faster DSE times for autonomous vehicle and augmented/virtual reality domains, yielding designs with 1.2-3x better throughput (iso-area) and up to 2.4x lower area (iso-throughput).
Subhankar Pal, Aporva Amarnath, et al.
HPCA 2025
Samuele Ruffino, Kumudu Geethan Karunaratne, et al.
DATE 2024
Sidney Tsai
MRS Fall Meeting 2023
Corey Liam Lammie, Hadjer Benmeziane, et al.
Nat. Rev. Electr. Eng.