A study of 80x86/80x87 floating-point execution

Abstract

The evolution of a processor architecture must include enhancements to both the fixed and floating-point units. To increase overall performance, architectural and implementation performance improvements to the floating-point unit must keep pace with the performance enhancements made to the fixed-point unit. In this paper we evaluate the performance enhancements provided by the evolution of the floating-point co-processor for the Intel 80x86 family, Using a suite of traces, we show how code compiled for predecessor co-processors will perform on current floating-point implementations.