Publication
IEEE JSSC
Paper

A Study in the Use of PLA-Based Macros

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Abstract

This paper describes a study in which a PLA-based macro design of a small processer is carried out in the same technology as the original “random” logic design of the same processor. The objectives of the study were to determine gains or losses in “technology utilization” when a PLA-based approach is used to replace the more conventional “random” logic approach. The results in this case are a design of equal performance and density, with only one-third the power of the original design. Copyright © 1979 by The Institute of Electrical and Electronics Engineers, Inc.

Date

01 Jan 1979

Publication

IEEE JSSC

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