ISSCC 2024
Conference paper

A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration


We present at 12nm, heterogeneous, RISC-V SoC for the application domain of collaborative autonomous vehicles. The SoC combines 14 different types of accelerators for key computation kernels with general purpose RISC-V cores, modified to boot Linux SMP. Our Distributed Hardware Power Management implementation for accelerators gives for throughput improvements while staying within a fixed power budget. Thanks to a scalable memory hierarchy and flexible data orchestration for accelerators, the SoC’s resources can be dynamically tailored to the needs of a particular application.