(Invited) cross-layer resilience: Challenges, insights, and the road ahead
- Eric Cheng
- Daniel Mueller-Gritschneder
- et al.
- 2019
- DAC 2019
Publications
Date
Featured collections
Popular topics
137 results for Pradip Bose
CLEAR: Crosslayer exploration for architecting resilience combining hardware and software techniques to tolerate soft errors in processor cores
- Eric Cheng
- Shahrzad Mirkhani
- et al.
- 2016
- DAC 2016
A 400-ns-Settling Time Hybrid Dynamic Voltage Frequency Scaling Architecture and Its Application in a 22-Core Network-on-Chip SoC in 12-nm FinFET Technology
- Erik Loscalzo
- Martin Cochet
- et al.
- 2024
- VLSI Technology and Circuits 2024
A 12nm Linux-SMP-Capable RISC-V SoC with 14 Accelerator Types Distributed Hardware Power Management and Flexible NoC-Based Data Orchestration
- Maico Cassel Dos Santos
- Tianyu Jia
- et al.
- 2024
- ISSCC 2024
NOVIA: A Framework for Discovering Non-Conventional Inline Accelerators
- David Trilla
- John-David Wellman
- et al.
- 2021
- MICRO 2021
Asymmetric resilience: Exploiting task-level idempotency for transient error recovery in accelerator-based systems
- Jingwen Leng
- Alper Buyuktosunoglu
- et al.
- 2020
- HPCA 2020
Resilient low voltage accelerators for high energy efficiency
- Nandhini Chandramoorthy
- Karthik Swaminathan
- et al.
- 2019
- HPCA 2019
DyHard-DNN: Even more DNN acceleration with dynamic hardware reconfiguration
- Mateja Putic
- Alper Buyuktosunoglu
- et al.
- 2018
- DAC 2018
BRAVO: Balanced Reliability-Aware Voltage Optimization
- Karthik Swaminathan
- Nandhini Chandramoorthy
- et al.
- 2017
- HPCA 2017
Safe limits on voltage reduction efficiency in GPUs: A direct measurement approach
- Jingwen Leng
- Alper Buyuktosunoglu
- et al.
- 2015
- MICRO 2015