Vertical-Transport Nanosheet Technology for Scaling beyond the Lateral-Transport Devices CMOS Era
- Hemanth Jagannathan
- Susan Fan
- et al.
- 2023
- SSDM 2023
Prior to joining the IBM research team, Teresa held various technical and management roles in the IBM Microelectronics where she was a process developer for advanced plasma dry etch applications in semiconductor processing. Later, she honed and expanded her skills and knowledge with the embedded DRAM technology development program where she focused on process integration, device design, and characterization. During her assignment as the department manager for ASIC and Foundry product characterization & yield group, she led a team of functional characterization engineers to execute yield ramp for an advanced OEM microprocessor program and multiple custom ASIC products to meet early adopter customers' fulfillment; this was done in deep collaboration with cross functional leaders. Her technical and leadership contributions to these projects and programs led to her recognition by IBM's highest internal award in 2006. Since joining research at Albany team, Teresa has embraced Albany Nanotech's ecosystem development with early efforts in program management for multiple partnerships with industry equipment leaders. These partnerships which she was deeply engaged also extend to materials providers, academic entities, and research consortia party. Teresa has continued to expand client relationships as a program manager, project leader, and co-Principal Investigator. Her efforts have helped further Albany Research in becoming a premier industry ecosystem center. Her leadership and technical contributions to Vertical Transport FET R&D resulted in an Outstanding Technical Achievement Award in 2023. Her technical interests span the full stack technology and system solutions with current focus on Data Analytic software application for semiconductor fab manufacturing as well as secure AI accelerator hardware solution.