Design of synchronous frequency dividers in 5-nm FinFET CMOS technology
- 2023
- Electronics Letters
Publications
Patents
- US
- 7403073
- US
- 7403057
- US
- 7378885
- US
- 7323913
- US
- 7295604
Projects
High-Speed I/O Links
Designing the next generation High-Speed I/O Links targeting low power consumption, low latency and small silicon area.
Top collaborators
PF
Pier Andrea Francese
Principal RSM - Analog Circuit Design
MB
Matthias Brändli
Digital Circuit Design
TM
Thomas Morf
Senior Research Scientist