22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL
- S. Narasimha
- P. Chang
- et al.
- 2012
- IEDM 2012
Publications
Date
Featured collections
Popular topics
30 results for J. Gill
Improved electromigration lifetime for copper interconnects using tantalum implant
- Jeff Gambino
- Timothy D. Sullivan
- et al.
- 2007
- MRS Spring Meeting 2007
High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL
- W.-H. Lee
- A. Waite
- et al.
- 2005
- IEDM 2005
Advanced bilayer low-k dielectric cap for reliable high performance Cu-low k interconnects
- Griselda Bonilla
- Lawrence A. Clevenger
- et al.
- 2008
- ADMETA 2008
Thermal modeling of on-chip interconnects and 3D packaging using EM tools
- Lijun Jiang
- Seshadri Kolluri
- et al.
- 2008
- EPEPS 2008
Reliability of Cu interconnects with Ta implant
- J.P. Gambino
- T.D. Sullivan
- et al.
- 2007
- IITC 2007
BEOL integration of highly damage -resistant porous ultra low-k material using direct CMP and via-first process
- T. Iijima
- Q. Lin
- et al.
- 2006
- IITC 2006
Minimum void size and 3-parameter lognormal distribution for em failures in Cu interconnects
- Baozhen Li
- Cathryn Christiansen
- et al.
- 2006
- IRPS 2006
A comprehensive study of low-k SiCOH TDDB phenomena and its reliability lifetime model development
- F. Chen
- O. Bravo
- et al.
- 2006
- IRPS 2006
65nm Cu integration and interconnect reliability in low stress K=2.75 SiCOH
- V. McGahay
- G. Bonilla
- et al.
- 2006
- IITC 2006