A 14 nm embedded STT-MRAM CMOS technology
- Daniel C. Edelstein
- M. Rizzolo
- et al.
- 2020
- IEDM 2020
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14 results for T. Maffitt
1.4Gsearch/s 2Mb/mm2 TCAM using two-phase-precharge ML sensing and power-grid preconditioning to reduce Ldi/dt power-supply noise by 50%
- Igor Arsovski
- Michael Fragano
- et al.
- 2017
- ISSCC 2017
A statistical study of magnetic tunnel junctions for high-density spin torque transfer-MRAM (STT-MRAM)
- R. Beach
- T. Min
- et al.
- 2008
- IEDM 2008
A Double-Data-Rate 2 (DDR2) Interface Phase-Change Memory with 533MB/s Read-Write Data Rate and 37.5ns Access Latency for Memory-Type Storage Class Memory Applications
- H. Lung
- C. Miller
- et al.
- 2016
- IMW 2016
A fully-functional 90nm 8Mb STT MRAM demonstrator featuring trimmed, reference cell-based sensing
- J. DeBrosse
- T. Maffitt
- et al.
- 2015
- CICC 2015
1Mb 0.41 μm2 2T-2R cell nonvolatile TCAM with two-bit encoding and clocked self-referenced sensing
- Jing Li
- Robert Montoye
- et al.
- 2013
- VLSI Circuits 2013
1Mb 0.41 μm2 2T-2R cell nonvolatile TCAM with two-bit encoding and clocked self-referenced sensing
- Jing Li
- Robert Montoye
- et al.
- 2013
- VLSI Technology 2013
A 512Mb phase-change memory (PCM) in 90nm CMOS achieving 2b/cell
- Gael F. Close
- Urs Frey
- et al.
- 2011
- VLSI Circuits 2011
A novel reconfigurable sensing scheme for variable level storage in phase change memory
- Jing Li
- Chao-I Wu
- et al.
- 2011
- IMW 2011
A 16Mb MRAM featuring bootstrapped write drivers
- J.K. DeBrosse
- C. Arndt
- et al.
- 2004
- VLSI Circuits 2004