Publications

81 results for Eric Joseph

Electrical characterization of FinFETs with fins formed by directed self assembly at 29 nm fin pitch using a self-aligned fin customization scheme
- - Hsinyu Tsai
  - Hiroyuki Miyazoe
  - et al.
- 2014
- IEDM 2014
An integrated silicon photonics technology for O-band datacom
- - N. Feilchenfeld
  - Frederick A. Anderson
  - et al.
- 2015
- IEDM 2015
CMOS-Compatible self-aligned In_0.53Ga_0.47As MOSFETs with gate lengths down to 30 nm
- - Amlan Majumdar
  - Yanning Sun
  - et al.
- 2014
- IEEE T-ED
MIEC (mixed-ionic-electronic-conduction)-based access devices for non-volatile crossbar memory arrays
- - Rohit S. Shenoy
  - Geoffrey W. Burr
  - et al.
- 2014
- Semiconductor Science and Technology
Fabrication of sub-20 nm nanopore arrays in membranes with embedded metal electrodes at wafer scales
- - Jingwei Bai
  - Deqiang Wang
  - et al.
- 2014
- Nanoscale
Two-dimensional pattern formation using graphoepitaxy of PS-b-PMMA block copolymers for advanced FinFET device and circuit fabrication
- - Hsinyu Tsai
  - Jed W. Pitera
  - et al.
- 2014
- ACS Nano
Fluorocarbon assisted atomic layer etching of SiO₂ using cyclic Ar/C₄F₈ plasma
- - Dominik Metzler
  - Robert L. Bruce
  - et al.
- 2013
- JVSTA
Self-aligned III-V MOSFETs: Towards a CMOS compatible and manufacturable technology solution
- - Y. Sun
  - A. Majumdar
  - et al.
- 2013
- IEDM 2013
200 mm wafer-scale integration of sub-20 nm sacrificial nanofluidic channels for manipulating and imaging single DNA molecules
- - C. Wang
  - S.W. Nam
  - et al.
- 2013
- IEDM 2013
Subtractive W contact and local interconnect co-integration (CLIC)
- - Fei Liu
  - Benjamin Fletcher
  - et al.
- 2013
- IITC 2013