High performance 14nm SOI FinFET CMOS technology with 0.0174μm2 embedded DRAM and 15 levels of Cu metallization
- C.-H.C-H. Lin
- Brian Greene
- et al.
- 2014
- IEDM 2014
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23 results for G. Northrop
Physical synthesis methodology for high performance microprocessors
- Yiu-Hing Chan
- Prabhakar Kudva
- et al.
- 2003
- DAC 2003
The impact of gate-oxide breakdown SRAM stability
- R. Rodríguez
- J.H. Stathis
- et al.
- 2002
- IEEE Electron Device Letters
High performance bulk planar 20nm CMOS technology for low power mobile applications
- Huiling Shang
- Sameer Jain
- et al.
- 2012
- VLSI Technology 2012
A semi-custom design of branch address calculator in the IBM Power4 microprocessor
- Pong-Fei Lu
- Gregory A. Northrop
- et al.
- 2005
- VLSI-DAT 2005
Backend CAD flows for "restrictive design rules"
- Mark Lavin
- Fook-Luen Heng
- et al.
- 2004
- ICCAD 2004
High-performance circuit design for the RET-enabled 65nm technology node
- Lars Liebmann
- Arnold Barish
- et al.
- 2004
- AMM 2004
Layout Optimization at the pinnacle of Optical Lithography
- Lars Liebmann
- Greg Northrop
- et al.
- 2003
- SPIE Advanced Microelectronic Manufacturing 2003
Analysis of the effect of the gate oxide breakdown on SRAM stability
- R. Rodríguez
- J.H. Stathis
- et al.
- 2002
- Microelectronics Reliability
Deep submicron design techniques for the 500MHz IBM S/390 G5 custom microprocessor
- D.E. Hoffman
- R.M. Averill
- et al.
- 1998
- ICCD 1998