Monolithic Stacked FET with Stepped Channels for Future Logic Technologies
- Chen Zhang
- Seungmin Song
- et al.
- 2024
- IEDM 2024
Publications
Date
Featured collections
Popular topics
20 results for Dan J. Dechene
Backside power distribution for nanosheet technologies beyond 2nm
- Ruilong Xie
- Wonhyuk Hong
- et al.
- 2024
- VLSI Technology and Circuits 2024
DTCO Guided Process Integration: Case Studies from FEOL & BEOL with BSPDN Topic: DTCO/DFM
- Minhaz Abedin
- Shahrukh Khan
- et al.
- 2024
- ASMC 2024
DTCO Guided Process Integration: Case Studies From FEOL & BEOL with BSPDN
- Minhaz Abedin
- Shahrukh Khan
- et al.
- 2024
- ASMC 2024
Methodology Development to Benchmark Power Delivery Designs in Advanced Technology Nodes
- Nicholas A. Lanzillo
- A. Chu
- et al.
- 2023
- SPIE Advanced Lithography + Patterning 2023
Next-Generation Logic Design Architecture for Vertical-Transport Nanosheets
- Biswanath (Biswa) Senapati
- Jeongho Do
- et al.
- 2023
- SPIE Advanced Lithography + Patterning 2023
Power Delivery Design, Signal Routing, and Performance of On-Chip Cobalt Interconnects in Advanced Technology Nodes
- Nicholas A. Lanzillo
- Albert Chu
- et al.
- 2021
- IEEE Transactions on VLSI Systems
Benchmarking Power Delivery Network Designs at the 5-nm Technology Node
- Nicholas A. Lanzillo
- Albert M. Chu
- et al.
- 2021
- IEEE T-ED
Vertical-Transport Nanosheet Technology for CMOS Scaling beyond Lateral-Transport Devices
- H. Jagannathan
- B. Anderson
- et al.
- 2021
- IEDM 2021
Challenges and Opportunities for Stacked Transistor: DTCO and Device
- J. Wang
- S.D. Suk
- et al.
- 2021
- VLSI Technology 2021