Publications

60 results for Hemanth Jagannathan

Methodology of ALD HfO₂ high-κ gate dielectric optimization by cyclic depositions and anneals
- - H. Jagannathan
  - Robert D. Clark
  - et al.
- 2010
- ECS Transactions
Challenges and solutions of FinFET integration in an SRAM cell and a logic circuit for 22 nm node and beyond
- - H. Kawasaki
  - V.S. Basker
  - et al.
- 2009
- IEDM 2009
Extremely scaled gate-first high-k/metal gate stack with EOT of 0.55 nm using novel interfacial layer scavenging techniques for 22nm technology node and beyond
- - K. Choi
  - H. Jagannathan
  - et al.
- 2009
- VLSI Technology 2009
Engineering band-edge high-κ/metal gate n-MOSFETs with cap layers containing group IIA and IIIB elements by atomic layer deposition
- - H. Jagannathan
  - L.F. Edge
  - et al.
- 2009
- ECS Meeting 2009
22 nm technology compatible fully functional 0.1 μm ² 6T-sram cell
- - B. Haran
  - A. Kumar
  - et al.
- 2008
- IEDM 2008
Engineering high dielectric constant materials for band-edge CMOS applications
- - H. Jagannathan
  - V. Narayanan
  - et al.
- 2008
- ECS Meeting 2008
High-K gate dielectric structures by atomic layer deposition for the 32nm and beyond nodes
- - R.D. Clark
  - S. Consiglio
  - et al.
- 2008
- ECS Meeting 2008
Integrating phase-change memory cell with Ge nanowire diode for crosspoint memory - Experimental demonstration and analysis
- - SangBum Kim
  - Yuan Zhang
  - et al.
- 2008
- IEEE Transactions on Electron Devices
Templated germanium nanowire synthesis using oriented mesoporous organosilicate thin films
- - Hemanth Jagannathan
  - Michael Deal
  - et al.
- 2006
- Journal of Vacuum Science and Technology B: Microelectronics and Nanometer Structures
Effect of oxide overlayer formation on the growth of gold catalyzed epitaxial silicon nanowires
- - Hemanth Jagannathan
  - Yoshio Nishi
  - et al.
- 2006
- Applied Physics Letters