Single-chip 1062 Mbaud CMOS transceiver for serial data communication
- J.F. Ewen
- A.X. Widmer
- et al.
- 1995
- ISSCC 1995
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100 results for Herschel Ainspan
A monolithic 2.3 Gb/s 100 mW clock and data recovery circuit
- M. Soyuer
- H. Ainspan
- 1993
- ISSCC 1993
A 250-mW 60-GHz CMOS Transceiver SoC Integrated with a Four-Element AiP Providing Broad Angular Link Coverage
- Bodhisatwa Sadhu
- Alberto Valdes-Garcia
- et al.
- 2020
- IEEE JSSC
A 128-Gb/s 1.3-pJ/b PAM-4 Transmitter with Reconfigurable 3-Tap FFE in 14-nm CMOS
- Zeynep Toprak-Deniz
- Jonathan E. Proesel
- et al.
- 2020
- IEEE JSSC
A 32 Gb/s, 4.7 pJ/bit Optical Link With-11.7 dBm Sensitivity in 14-nm FinFET CMOS
- Jonathan E. Proesel
- Zeynep Toprak-Deniz
- et al.
- 2018
- IEEE JSSC
A 1.8 pJ/bit 16 × 16Gb/s source-synchronous parallel interface in 32nm SOI CMOS with receiver redundancy for link recalibration
- Timothy O. Dickson
- Yong Liu
- et al.
- 2016
- IEEE JSSC
A 1.4 pJ/bit, Power-Scalable 16×12 Gb/s Source-Synchronous I/O With DFE Receiver in 32 nm SOI CMOS Technology
- Timothy O. Dickson
- Yong Liu
- et al.
- 2015
- IEEE JSSC
A 28 GHz hybrid PLL in 32 nm SOI CMOS
- Mark Ferriss
- Alexander Rylyakov
- et al.
- 2014
- IEEE JSSC
A 28-Gb/s 4-Tap FFE/15-Tap DFE Serial Link Transceiver in 32-nm SOI CMOS Technology
- John F. Bulzacchelli
- Christian Menolfi
- et al.
- 2012
- IEEE JSSC
A Monolithically Integrated Silicon Photonics 8×8 Switch in 90nm SOI CMOS
- Jonathan E. Proesel
- Nicolas Dupuis
- et al.
- 2020
- VLSI Circuits 2020