III-V-on-CMOS Devices and Circuits: Opportunities in Quantum Infrastructure
- C. B. Zota
- Thomas Morf
- et al.
- 2019
- IEDM 2019
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62 results for W. Riess
Lateral strain profile as key technology booster for all-silicon tunnel FETs
- Kathy Boucart
- Adrian Mihai Ionescu
- et al.
- 2009
- IEEE Electron Device Letters
Donor deactivation in silicon nanostructures
- Mikael T. Björk
- Heinz Schmid
- et al.
- 2009
- Nature Nanotechnology
Outperforming the conventional scaling rules in the quantum-capacitance limit
- J. Knoch
- W. Riess
- et al.
- 2008
- IEEE Electron Device Letters
Nanoparticle printing with single-particle resolution
- Tobias Kraus
- Laurent Malaquin
- et al.
- 2007
- Nature Nanotechnology
A simulation-based study of sensitivity to parameter fluctuations of silicon tunnel FETs
- Kathy Boucart
- Adrian M. Ionescu
- et al.
- 2010
- ESSDERC 2010
VLS-grown silicon nanowires - Dopant deactivation and tunnel FETs
- Mikael T. Björk
- K. Moselund
- et al.
- 2010
- SNW 2010
Off axis holography of doped and intrinsic silicon nanowires: Interpretation and influence of fields in the vacuum
- M.I. Den Hertog
- L. Rouviere
- et al.
- 2010
- JPCS
VLS-grown silicon nanowire tunnel FET
- K. Moselund
- H. Ghoneim
- et al.
- 2009
- DRC 2009
Comparison of VLS grown Si NW tunnel FETs with different gate stacks
- K. Moselund
- H. Ghoneim
- et al.
- 2009
- ESSDERC 2009