Publication
IEDM 2019
Conference paper

III-V-on-CMOS Devices and Circuits: Opportunities in Quantum Infrastructure

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Abstract

In this work, we present a sequentially 3D integrated III-V-on-CMOS RF MOSFET technology with state-of-the-art RF performance. This platform is particularly promising for cryogenic applications where cooling power and space is limited, as the III-V devices offer reduced power dissipation while the 3D architecture enables small form-factors and reduced latencies. The unique features of III-V materials also enable novel devices. Here, we propose and show key experimental results of a quantized LNA, a cryogenic III-V nanowire amplifier that can significantly outperform standard HEMT technology. As heat dissipation is a key limitation in 3D architectures, we explore self-heating effects in CMOS using integrated temperature sensors. These results show the promise of III-V-on-CMOS for cryogenic applications such as integrated electronics for HPC, quantum computing and space.

Date

01 Dec 2019

Publication

IEDM 2019

Authors

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