0. 5- mu M-CHANNEL CMOS TECHNOLOGY OPTIMIZED FOR LIQUID-NITROGEN-TEMPERATURE OPERATION.
- J.Y.-C. Sun
- Y. Taur
- et al.
- 1985
- IEDM 1985
Publications
Date
Featured collections
Popular topics
16 results for S. Klepner
A Josephson Technology System Level Experiment
- M.B. Ketchen
- B.J. van der Hoeven
- et al.
- 1981
- IEEE Electron Device Letters
Designing a testable System on a Chip
- S.V. Kosonocky
- A.A. Bright
- et al.
- 1998
- VTS 1998
3.5ns CMOS 64K ECL RAM at 77°K
- S.E. Schuster
- T.I. Chappell
- et al.
- 1988
- VLSI Circuits 1988
6.2 ns 64Kb CMOS RAM with ECL interfaces
- T.I. Chappell
- S.E. Schuster
- et al.
- 1988
- VLSI Circuits 1988
A high performance liquid-nitrogen CMOS SRAM technology
- J.Y.-C. Sun
- S. Klepner
- et al.
- 1988
- ESSDERC 1988
A 2-ns Cycle, 3.8-ns Access 512-kb CMOS ECL SRAM with a Fully Pipelined Architecture
- Terry I. Chappell
- Barbara A. Chappell
- et al.
- 1991
- IEEE Journal of Solid-State Circuits
A 3.5-ns/77 K and 6.2-ns/300 K 64K CMOS RAM with ECL Interfaces
- Terry I. Chappell
- Stanley E. Schuster
- et al.
- 1989
- IEEE Journal of Solid-State Circuits
Source-Drain Contact Resistance in CMOS with Self-Aligned TiSi2
- Yuan Taur
- Jack Yuan-Chen Sun
- et al.
- 1987
- IEEE T-ED
Submicrometer-Channel CMOS for Low-Temperature Operation
- Jack Yuan-Chen Sun
- Yuan Taur
- et al.
- 1987
- IEEE T-ED