Wide limited switch dynamic logic circuit implementations

Abstract

Wide circuit implementation of Limited Switch Dynamic Logic (LSDL), a high performance logic circuit, with a modified pseudo-nMOS style load has been studied in this paper. A conventional two levels of 8-way mux implementation and a wide 64-way mux implementation of the 64-bit rotator circuit were used in the analysis. The resultant wide circuit implementation consumes less power, maintains robustness to noise and power rail bounce and reduces the pipeline depth to a single stage. The effect of process variation on circuit performance is evaluated. Based on the analysis, a new circuit style known as hybrid LSDL has been proposed. © 2006 IEEE.