Future high-power chip stacks with several hundred Watts of power dissipation rely on novel cooling topologies. In this paper, we are introducing dual-side convective cooling considering a lid-integral silicon cold plate in combination with an interposer with embedded fluid cavity. The cavity in the interposer is established by two back-to-back bonded interposer shells with integrated fluid channels. This approach allows the implementation of a cavity height of 240 μm at a through-silicon-via pitch of 225 μm. Interposer test vehicles are fabricated to explore the heat removal capability of three different cavity designs; Channel 2-Port, Pin-Fin 2-Port and Channel 4-Port. They are studied with respect to their thermal response on uniform and non-uniform power maps. The projected power map of a three-tier chip stack with an aggregate power dissipation of more than 600W on 4cm2 area is considered. Heat and mass transport experiments are performed. Changes from laminar to transitional flow regimes are discussed. The transition is most prominent for the pin-fin cavity, indicated by a drastic pressure drop increase above 0.15 L/min and a junction temperature drop. The 4-port design with microchannels outperformed the other designs, considering pressure drop as the relevant boundary condition. The performance difference can be large especially for non-uniform heat fluxes and needs to be studied on a case-by-case basis.