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IEEE T-DMR
Paper

The impact of aging effects and manufacturing variation on SRAM soft-error rate

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Abstract

This paper describes modeling and hardware results of how the soft-error rate (SER) of a 65-nm silicon-on-insulator SRAM memory cell changes over time, as semiconductor aging effects shift the SRAM cell behavior. This paper also describes how the SER changes in the presence of systematic and random manufacturing variation. © 2008 IEEE.

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Publication

IEEE T-DMR