Scaling MOSFETs to the Limit: A Physicists's Perspective

Abstract

To circumvent its present practical limits—mainly gate leakage and poor performance—‘MOSFET scaling’ has taken a different meaning: Not simply shrinking the device, but changing its nature. Here it is suggested that long-range Coulomb interactions constitute a possible fundamental cause of the poor performance of sub-50 nm devices. Alternative device-designs and materials are briefly discussed from a transport-physics perpsective: High-κ insulators, transport in thin Si body (SOI and double-gate), along different crystal directions and on different materials. The major role played by the interfaces (surface plasmons and phonons, roughness, confinement) emerges as one of the most important common elements.