S. Kim, S.V. Kosonocky, et al.
ISLPED 2003
This paper proposes new SOI circuit strategies for simultaneous reduction of standby gate and sub-threshold leakages. Various enhanced MTCMOS design alternatives are analyzed. A new method for assigning the VTH and sizes of header and footer transistors is proposed, and stacking of headers/footers is analyzed. The optimum stacking height and tapering/sizing ratio under various design constraints are determined. Our strategies reduce MTCMOS standby leakage further by as much as 20X and reduce virtual supply noise by 15%.
S. Kim, S.V. Kosonocky, et al.
ISLPED 2003
Koushik K. Das, Rajiv V. Joshi, et al.
ESSCIRC 2003
Aditya Bansal, Keunwoo Kim, et al.
ICICDT 2007
Koushik K. Das, Shih-Hsien Lo, et al.
IEEE International SOI Conference 2004