VLSI Technology 2018
High endurance self-heating OTS-PCM pillar cell for 3D stackable memory
For the first time published, high endurance OTS (ovonic threshold switch, here, TeAsGeSiSe-based) is integrated with PCM (here, doped Ge2Sb2Te5) to form a 3D stackable pillar type device. With the help of an etch buffer layer and a damage-free pillar RIE process, we achieved 100% array yield without OTS/PCM composition modification. Anneal tests show this one-selector/one-resistor (1S1R) pillar device is BEOL-compatible.We report excellent electrical performance by 1S1R OTS-PCM device; selector provides the fast turn on/off speed which enables 10ns fast RESET speed, program endurance is 109 cycles, and read endurance is higher than 1011 cycles.