Floating-body concerns for SOI dynamic random access memory (DRAM)

Abstract

It has become increasingly difficult to write a usable signal into the dynamic random access memory (DRAM) storage capacitor because of the nonscalability of threshold voltage which is limited by the subthreshold slope and substrate sensitivity. It is important that the threshold voltage of the DRAM array MOSFET be made as low as possible while meeting the static off-current objective for charge retention. Silicon on insulator (SOI) technology is ideal for these types of applications since its superior subthreshold slope and low substrate sensitivity yield a lower source-follower threshold voltage. However, transient effects of the floating body must be considered for long data retention time and low active power.