David F. Heidel, Kenneth P. Rodbell, et al.
IEEE TNS
This paper describes upsets of 65 nm flip-flops caused by Single-Event-Transients in clock-tree circuits. The upset rate is predicted through modeling, and compared to upset rates measured on a 65 nm test chip with 15 MeV carbon ions and 148 MeV protons. © 2009 IEEE.
David F. Heidel, Kenneth P. Rodbell, et al.
IEEE TNS
Jeng-Bang Yau, Michael S. Gordon, et al.
VLSI-TSA 2011
Jonathan A. Pellish, Michael A. Xapsos, et al.
RADECS 2009
Keith A. Jenkins, Anup P. Jose, et al.
ESSCIRC 2005