J.C. Scott, O. Gluschenkov, et al.
VLSI Technology 2009
In this letter, we report germanium (Ge) p-channel MOSFETs with a thin gate stack of Ge oxynitride and low-temperature oxide (LTO) on bulk Ge substrate without a silicon (Si) cap layer. The fabricated devices show 2 × higher transconductance and ∼ 40% hole mobility enhancement over the Si control with a thermal SiO2 gate dielectric, as well as the excellent subthreshold characteristics. For the first time, we demonstrate Ge MOSFETs with less than 100-mV/dec subthreshold slope.
J.C. Scott, O. Gluschenkov, et al.
VLSI Technology 2009
J. Cai, P.M. Mooney, et al.
Journal of Applied Physics
H. Nayfeh, D. Singh, et al.
IEEE Electron Device Letters
M. Yang, K.K. Chan, et al.
VLSI Technology 2006