Device design considerations for next generation CMOS technology: Planar FDSOI and FinFET (Invited)

Abstract

Conventional devices have been scaled by thinning gate dielectrics, forming shallower extensions, increasing channel doping, and lowering power supply voltages. Many of these key scaling methods are reaching fundamental limitations. New thin body device architectures such as UTBB and FinFETs are emerging which do not rely on the conventional scaling approach. The short channel effects for these new device options improve as the channel thickness is reduced. The new device options have new challenges and opportunities. This paper focuses on device design considerations for UTBB and FinFETs. © 2013 IEEE.