VLSI Technology 2023
Conference paper

Contact Cavity Shaping and Selective SiGe:B Low-Temperature Epitaxy Process Solution for sub 10-9 Ω.cm2 Contact Resistivity in Nonplanar FETs

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In order to tackle the CMOS contact resistance bottleneck, we developed a contact cavity shaping process that leverages a Reactive Ion Etching (RIE) technology, and a selective highly doped SiGe:B epitaxial process allowing an active boron doping level of 2E21 By co-optimizing these processes in the contact module on 300mm wafers, we demonstrate a record low transistor contact resistance of 11 Ω. μm of Weff with corresponding effective ρc of 5.2× 10-10 Ω.cm2, which translates into a device Ieff performance gain of 44/19% (median/leading edge).