VLSI Technology 2023
Conference paper

Contact Cavity Shaping and Selective SiGe:B Low-Temperature Epitaxy Process Solution for sub 10-9 Ω.cm2 Contact Resistivity in Nonplanar FETs


In order to tackle the CMOS contact resistance bottleneck, we developed a contact cavity shaping process that leverages a Reactive Ion Etching (RIE) technology, and a selective highly doped SiGe:B epitaxial process allowing an active boron doping level of 2E21 ${^-3} $. By co-optimizing these processes in the contact module on 300mm wafers, we demonstrate a record low transistor contact resistance of 11 Ω.um of $ W{_eff} $ with corresponding effective Rho c of 5.2x10-10 Ω. $cm^2 $, which translates into a device $ I{_eff} $ performance gain of 44/19% (median/leading edge).