G. Almasi, D. Hale, et al.
Concurrency: Practice and Experience
System-on-a-chip technology allows a level of integration that can be leveraged to develop inexpensive high-performance, low-power computing nodes. When used in aggregate, this approach promises to challenge conventional supercomputer architectures in the high-performance computing arena. Systems under consideration reach into the hundreds of thousand nodes per machine. Architecture for these systems are described.
G. Almasi, D. Hale, et al.
Concurrency: Practice and Experience
Peter F. Corbett, Dror G. Feitelson, et al.
IBM Systems Journal
M. Farreras, T. Cortes, et al.
ICS 2006
G. Almasi, L. Bachega, et al.
IPDPS 2003