Analog resistive crossbar arrays for neural network acceleration

Abstract

We will discuss the development of analog resistive crossbar arrays for neural network acceleration, and more specifically, for deep learning (DL). Near term, the efficiency of digital DL accelerators can be improved by running the neural network arithmetic at lower precision. We will see how that can be done without sacrificing accuracy on the neural network task. Beyond that, non-volatile memory-based in-memory computing is a long-term path to higher deep learning compute efficiency. We are developing analog accelerators that are based on crossbar arrays of resistive devices. In practice, real devices we build deviate from their ideal properties in a number of ways. We will discuss adjustments to the deep learning algorithms that accommodate such non-idealities, to ensure that we are not improving compute efficiency at the expense of accuracy. To reach the goal of optimizing performance while leaving accuracy unaffected, co-development and co-optimization across the entire stack is required.