Reliable Chiplet integration on high density laminate (2.X D) for AI Hardware

Abstract

With a continuous focus to maximize computational performance by optimizing package size and reducing fabrication costs, this paper presents the most recent advances on the technology of DBHi (Direct Bonded Heterogeneous Integration) packages as a chiplet packaging technology. This is one of the promising solutions for AI hardware as it can provide high bandwidth and low power communication between chiplets. In this study, we present DBHi with very fine chiplet interconnection pitch of 30 and 75µm pitch with two different DBHi architectures called Standard DBHi and Surface DBHi. These two DBHi configurations are tested for thermomechanical stresses during deep thermal cycling (DTC). The finite element model calculated with these architectures confirms overall robustness of Surface DBHi configuration. In this work, we present the effects and the advantages that came with Surface DBHi i.e. thinning down the Si bridge and the removal of cavity in the laminate for bonding process and their influence on the overall thermomechanical performance of the package.