A statistical critical path monitor in 14nm CMOS

Abstract

Local variation of delay paths has a significant impact on modern microprocessor performance and yield. A critical path monitor is reported which extracts timing variability information on various critical paths, including sample processor paths. The very compact circuit contains 256 copies of 15 different delay paths, enabling measurement of the statistics of delay variation, as a function of threshold voltage, supply voltage, fanout, temperature, and circuit topology. Measurements of 14nm SOI finFET [1] circuit path delays are presented. The reported sensor can offer a variety of advantages on a processor chip, ranging from testing time improvement to power savings.