Program Day 2 - Wednesday 18/11/2015

09:00 - 10:00 Keynote: Reasoning about Program Data Structure Shape: from the Heap to Distributed Systems,
Prof. Mooly Sagiv, Tel Aviv University
Session Chair: Sharon Keidar-Barner

10:00 - 11:00 Technical Session: SAT
Chair: Ofer Strichman

SAT-Based Explicit LTL Reasoning,
Jianwen Li, Shufang Zhu, Geguang Pu and Moshe Vardi

Understanding VSIDS Branching Heuristics in Conflict-Driven Clause-Learning SAT Solvers,
Jia Liang, Vijay Ganesh, Ed Zulkoski, Atulan Zaman and Krzysztof Czarnecki

11:00 - 11:30 Coffee Break

11:30 - 12:30 Technical Session: Timed Systems
Chair: Armin Biere

Quasi-equal Clock Reduction: Eliminating Assumptions on Networks,
Christian Herrera and Bernd Westphal

Resource-Parameterized Timing Analysis of Real-Time Systems,
Jin Hyun Kim, Brian Nielsen, Kim G. Larsen, Marius Mikucionis and Axel Legay

12:30 - 13:30 Keynote: Between Art and Craft: the Self-conception of a Verification Engineer,
Bodo Hoppe, Hardware Verification, IBM
Session Chair: Ronny Morad

13:30 - 21:00 Social Event (boxed lunch)