Keynote Speakers

Title: Between Art and Craft: the Self-conception of a Verification Engineer
Bodo Hoppe, Hardware Verification, IBM

In the early days of Verification, people wrote tests manually. This was done mostly by the designers themselves. The 90s marked the creation of software of automatic test generation. However, it was realized that stimuli generation, reference modeling and result prediction required dedicated skills.

With the progress of the field the required skills for contributing to the Verification team became broader and included skills such as constraint solving, acceleration, and formal Verification. Even more importantly, the Verification engineer became independent. The opposite pole to logic design. And the job of a Verification engineer became a career path.

Nowadays the boundaries fade again. A logic designer is expected to do formal analysis of his design, creating assertions and interesting coverage events and, last but not least, perform designer simulation to increase the initial quality of the logic delivery.

What are the most valuable talents for an engineer to have to be hired for hardware Verification? The art of debugging? Thinking Logically? System Analysis? Programming? Creativity?

Going into the future, there is a strong need to rethink the self-conception of Verification engineers and how they team up with the logic designers working in an agile environment.

Speaker Bio
Bodo Hoppe received his B.Sc. degree in Communications Engineering at the University of Cooperative Education of Stuttgart in 1993. He joined IBM Research & Development GmbH in Hardware Verification. He worked and lead various domain areas such as processor units, IO adapters, bridges, switches, processor core, SoCs and systems. His verification work involves coherency verification, processor architecture and performance validation. He developed several new methodologies in the area of random biased verification, acceleration and structural verification. His contributions to the methodology contributed to deliver a two pass design on the latest zSeries processor chips. He published several papers and patents. His focus areas are reliability verification, microprocessor unit, core and system verification. He is currently the verification lead for a future IBM System z.

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