22nm High-performance SOI technology featuring dual-embedded stressors, Epi-Plate High-K deep-trench embedded DRAM and self-aligned Via 15LM BEOL
- S. Narasimha
- P. Chang
- et al.
- 2012
- IEDM 2012
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18 results for Naftali Lustig
A 45 nm CMOS node Cu/low-k/ ULtra low-k PECVD SiCOH (k=2.4) BEOL technology
- S. Sankaran
- S. Arai
- et al.
- 2006
- IEDM 2006
High performance 45-nm SOI technology with enhanced strain, porous low-k BEOL, and immersion lithography
- S. Narasimha
- K. Onishi
- et al.
- 2006
- IEDM 2006
Full copper wiring in a sub-0.25 μm CMOS ULSI technology
- D. Edelstein
- J. Heidenreich
- et al.
- 1997
- IEDM 1997
Optimization of Cu damascene electrodeposition process in ULSI for yield and reliability improvement
- Ingrid Shao
- T. Cheng
- et al.
- 2013
- ECS Transactions
Silicon containing polymer in applications for 193 nm high NA lithography processes
- Scan Bums
- Dirk Pfeiffer
- et al.
- 2006
- SPIE Advanced Lithography 2006
First microprocessors with immersion lithography
- D. Gil
- T. Bailey
- et al.
- 2005
- SPIE Advanced Lithography 2005
A high performance 0.13 μm copper BEOL technology with low-k dielectric
- R.D. Goldblatt
- B.N. Agarwala
- et al.
- 2000
- IITC 2000
Copper dual damascene wiring for sub-0.25 μm CMOS technology
- J. Heidenreich
- D. Edelstein
- et al.
- 1998
- IITC 1998
Trilayer development for 193 nm immersion lithography
- Sean Burns
- Martin Burkhardt
- et al.
- 2007
- J. Photopolym. Sci. Tech.