Silicon microchannel cooling for high power chips
- Evan G. Colgan
- Bruce Furman
- et al.
- 2006
- HVAC and R Research
Publications
43 results for Robert Polastre
Characterization of flip chip microjoins up to 40 GHz using silicon carrier
- Chirag S. Patel
- Paul S. Andry
- et al.
- 2005
- IITC 2005
A practical implementation of silicon microchannel coolers for high power chips
- E.G. Colgan
- B.K. Furman
- et al.
- 2005
- SEMI-THERM 2005
Three dimensional silicon integration using fine pitch interconnection, silicon processing and silicon carrier packaging technology
- John U. Knickerbocker
- Chirag S. Patel
- et al.
- 2005
- CICC 2005
Development of next-generation system-on-package (SOP) technology based on silicon carriers with fine-pitch chip interconnection
- John U. Knickerbocker
- Paul S. Andry
- et al.
- 2005
- IBM J. Res. Dev
High conductivity gate metallurgy for TFT/LCD's
- P.M. Fryer
- E.G. Colgan
- et al.
- 1998
- MRS Spring Meeting 1998
High conductivity gate metallurgy for TFT/LCD's
- P.M. Fryer
- E.G. Colgan
- et al.
- 1998
- MRS Spring Meeting 1998
Electrical test sites for AMLCD-TFT array process characterization
- E.G. Colgan
- R.J. Polastre
- et al.
- 1998
- MRS Spring Meeting 1998
A 10.5-in.-diagonal SXGA active-matrix display
- E.G. Colgan
- P.M. Alt
- et al.
- 1998
- IBM J. Res. Dev
Thin-film-transistor process-characterization test structures
- E.G. Colgan
- R.J. Polastre
- et al.
- 1998
- IBM J. Res. Dev