Solder Injected through Via for Multi Stacked Wafers
- Akihiro Horibe
- Kuniaki Sueoka
- et al.
- 2016
- ECTC 2016
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42 results for Yasumitsu Orii
Novel Low Cost Bumping Process with Non-strip Type Photosensitive Resin and Injection Molded Solder (IMS) for Fine Pitch Flip Chip Joining
- Toyohiro Aoki
- Takashi Hisada
- et al.
- 2016
- ECTC 2016
Through silicon via process for effective multi-wafer integration
- Akihiro Horibe
- Kuniaki Sueoka
- et al.
- 2015
- ECTC 2015
Dual-side cooling for a three-dimensional (3D) chip stack : Additional cooling from the laminate (substrate) side
- Keiji Matsumoto
- Hiroyuki Mori
- et al.
- 2015
- ECTC 2015
Wafer IMS (Injection molded solder) - A new fine pitch solder bumping technology on wafers with solder alloy composition flexibility
- Jae Woong Nah
- Jeffrey Gelorme
- et al.
- 2014
- ECTC 2014
Wafer-level non conductive films for exascale servers
- Akihiro Horibe
- Sayuri Kohara
- et al.
- 2014
- ECTC 2014
Thermally enhanced pre-applied underfills for 3D integration
- Akihiro Horibe
- Keishi Okamoto
- et al.
- 2013
- ECTC 2013
No Clean Flux technology for large die flip chip packages
- Akihiro Horibe
- Kang-Wook Lee
- et al.
- 2013
- ECTC 2013
Electromigration analysis of peripheral ultra fine pitch C2 flip chip interconnection with solder capped Cu pillar bump
- Yasumitsu Orii
- Kazushige Toriyama
- et al.
- 2011
- ECTC 2011
Vacuum underfill technology for advanced packaging
- Akihiro Horibe
- M.-C. Paquet
- et al.
- 2011
- ECTC 2011