Sparse regression driven mixture importance sampling for memory design
- Maria Malik
- Rajiv V. Joshi
- et al.
- 2018
- IEEE Transactions on VLSI Systems
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A universal hardware-driven PVT and layout-aware predictive failure analytics for SRAM
- Rajiv V. Joshi
- Sudesh Saroop
- et al.
- 2016
- IEEE Transactions on VLSI Systems
Super fast physics-based methodology for accurate memory yield prediction
- Rajiv V. Joshi
- Keunwoo Kim
- et al.
- 2015
- IEEE Transactions on VLSI Systems
Novel 4 GHz interleaved SRAM cells with asymmetrical precharge in 45 nm PDSOI technology
- Rajiv V. Joshi
- Rouwaida Kanj
- et al.
- 2014
- IEEE Trans Semicond Manuf
A novel column-decoupled 8T cell for low-power differential and domino-based SRAM design
- Rajiv V. Joshi
- Rouwaida Kanj
- et al.
- 2011
- IEEE Transactions on VLSI Systems
The dawn of predictive chip yield design: Along and beyond the memory lane
- Rajiv Joshi
- Rouwaida Kanj
- et al.
- 2010
- IEEE Design and Test of Computers
Root-finding methods for assessing SRAM stability in the presence of random dopant fluctuations
- Rouwaida Kanj
- Zhuo Li
- et al.
- 2009
- IEEE Trans Semicond Manuf
The impact of aging effects and manufacturing variation on SRAM soft-error rate
- Ethan H. Cannon
- A.J. KleinOsowski
- et al.
- 2008
- IEEE T-DMR
Design considerations for PD/SOI SRAM: Impact of gate leakage and threshold voltage variation
- Rouwaida Kanj
- Rajiv V. Joshi
- et al.
- 2008
- IEEE Trans Semicond Manuf
Critical evaluation of SOI design guidelines
- Rouwaida Kanj
- Elyse Rosenbaum
- 2004
- IEEE Transactions on VLSI Systems