First Experimental Demonstration of MRAM Data Scrubbing: 80 Mb MRAM with 40 nm junctions for Last Level Cache Applications
- H. Wu
- V. Katragadda
- et al.
- 2021
- IEDM 2021
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9 results for Heng Wu
Full Bottom Dielectric Isolation to Enable Stacked Nanosheet Transistor for Low Power and High Performance Applications
- J. Zhang
- S. Pancharatnam
- et al.
- 2019
- IEDM 2019
External Resistance Reduction by Nanosecond Laser Anneal in Si/SiGe CMOS Technology
- Oleg Gluschenkov
- Heng Wu
- et al.
- 2018
- IEDM 2018
Parasitic Resistance Reduction Strategies for Advanced CMOS FinFETs beyond 7nm
- Heng Wu
- Oleg Gluschenkov
- et al.
- 2018
- IEDM 2018
Integrated dual SPE processes with low contact resistivity for future CMOS technologies
- Heng Wu
- Soon-Cheon Seo
- et al.
- 2017
- IEDM 2017
Parasitic Resistance Reduction for Aggressively Scaled Stacked Nanosheet Transistors
- Su-Chen Fan
- Ruilong Xie
- et al.
- 2020
- IITC 2020
Direct Partition Measurement of Parasitic Resistance Components in Advanced Transistor Architectures
- Zuoguang Liu
- Heng Wu
- et al.
- 2019
- VLSI Technology 2019
Leakage aware Si/SiGe CMOS FinFET for low power applications
- G. Tsutsui
- C. Durfee
- et al.
- 2018
- VLSI Technology 2018
Improved Air Spacer for Highly Scaled CMOS Technology
- Kangguo Cheng
- Chanro Park
- et al.
- 2020
- IEEE Transactions on Electron Devices