We use first-principles calculations to investigate the structural and transport properties of various Cu/Ta(N)/Cu interface stacks, which are representative of the metal interfaces located at the bottom of vertical interconnects in state-of-the-art back-end-of-line technology. In particular, we consider approximately 2-nm thick layers of several different Ta-based barrier layers sandwiched between two Cu(111) layers, including TaN, α-Ta, β-Ta, and a bilayer TaN/ α-Ta structure. Our results highlight that the bilayer Cu/TaN/ α-Ta/Cu structure shows both an attractive combination of low electrical resistance and superior dielectric adhesion. We also find that inelastic phonon transport across the interface structures is largely determined by the frequency overlap of the bulk-like phonon density of states of each metal layer. Our results are fed into a simple interconnect performance benchmarking model based on a single-driver signal wire, where we find that metal barrier optimization can result in a net 2.5% stage delay reduction without comprising reliability.