Strained-silicon / silicon-germanium-on-insulator for high-performance CMOS : A manufacturable process for 300 mm substrates

Abstract

A process to fabricate 200 and 300 mm SSOI substrates has been developed. A "thermal mixing" process creates an SGOI layer using high-temperature oxidation of an initial SiGe/SOI layer structure, upon which strained silicon is subsequently grown. An epitaxial silicon growth method using an etching pre-bake process is described that is capable of removing interfacial oxygen and carbon thereby lowering the defect density. SSOI substrates with etch pit densities in the low 10 6/cm 2 and stacking fault densities below 10/cm 2 can be produced. Since the thermal mixing oxidation and epitaxial growing processes are very uniform, the final SGOI and SSOI thickness variations are similar compared to starting SOI substrates. Deeply scaled MOSFET transistors with 60 nm minimum gate length have been build on these SSOI substrates. The strained silicon devices show a performance enhancement of ∼7% (DC) and ∼20% (pulsed) in the long-channel saturated drain current I dsat compared to devices on control SOI wafers.