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Publication
VLSI Technology 2013
Conference paper
Scaling challenges of packaging in the Era of Big Data
Abstract
The exascale computing is required in the Era of Big Data. In order to achieve this demand, new technology innovation must be required and packaging scaling including 3D-IC with TSV (Through Silicon Vias) is one of most promising technology. To increase the total bandwidth, the fine pitch die to die interconnection is necessary. Micro-bumping, thermally enhanced underfill and advanced interposer technologies are one of the key technologies. Material selection for reliable fine-pitch interconnection has become a critical challenge in 3D chip stacking. Underfill material between die to die is also very important to reduce the total packaging stress and to enhance the vertical thermal conductivity. Low CTE high density organic substrate is emerging technology for 2.5D structure. © 2013 JSAP.