High thermal conductivity underfill for the thermal management of three-dimensional (3D) chip stacks

Abstract

It has been experimentally clarified that one of the thermal resistance bottlenecks of a three-dimensional (3D) chip stack is interconnection (solder bumps and underfill) between stacked chips. High thermal conductivity underfill, which we call high thermal conductivity inter chip fill (ICF), is expected to reduce the thermal resistance of interconnection efficiently, because the area which is occupied by ICF is larger than solder bumps. It is shown by simulation how high thermal conductivity ICF contributes to decrease the thermal resistance of interconnection. Also material formulation of high thermal conductivity ICF is demonstrated.