About cookies on this site Our websites require some cookies to function properly (required). In addition, other cookies may be used with your consent to analyze site usage, improve the user experience and for advertising. For more information, please review your options. By visiting our website, you agree to our processing of information as described in IBM’sprivacy statement. To provide a smooth navigation, your cookie preferences will be shared across the IBM web domains listed here.
Publication
ICMTS 2011
Conference paper
Scalable thermal resistance model for single and multi-finger silicon-on-insulator MOSFETs
Abstract
This paper presents a thermal resistance model for silicon-on-insulator MOSFETs. The proposed model accounts for various heat dissipation paths in the device accurately and is accurate for both multi and single finger devices. Model development is based on carefully designed test structures to account for different heat dissipations paths. Improvement in the drain current fits across devices when using proposed model over standard BSIMSOI4.3 validates the model. © 2011 IEEE.