Power-gating schemes for Ultra-Thin SOI (UTSOI) circuits in hybrid SOI-epitaxial CMOS structures

Abstract

Several novel schemes of implementing MTCMOS circuits in hybrid UTSOI-epitaxial CMOS structures are proposed and analyzed through comprehensive circuit simulations. The schemes offer intrinsic high circuit density and facilitate header/footer body biasing techniques for performance enhancement and leakage reduction. The effectiveness in improving active-mode performance, and reducing virtual supply bounce and standby leakage power is demonstrated. © 2006 IEEE.