Publication
VLSI-TSA 1991
Conference paper

On integrating control algorithms for buffer management and concurrency for parallel transaction processing systems

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Abstract

The performance of multi-processor based data sharing complex for transaction processing can be enhanced through the use of an integrated concurrency-coherency-recovery protocol. This protocol, combined with the use of shared main memory buffer, can allow early commit of transaction updates, reduce multi-system coupling overhead, and eliminate the unnecessary disk updates in transaction processing in normal time. Results obtained from performance simulation study show a significant improvement in the maximum transaction throughput can be sustained if this integrated protocol is used.

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VLSI-TSA 1991

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