Yichen Xu, Baoqi Zhu, et al.
VLSI Technology and Circuits 2026
This study investigates the impact of metal-oxide resist process conditions, development methods, and etch techniques on overall pattern fidelity 0.33 NA EUV lithography at 28nm pitch. Multiple novel development strategies were evaluated and then co-optimized with track and etch process conditions. Key metrics include critical dimension, line edge roughness, line width roughness, defectivty and yield. The results highlight the importance of co-optimizing process conditions to enable high-resolution, low-defect patterning for advanced nodes.
Yichen Xu, Baoqi Zhu, et al.
VLSI Technology and Circuits 2026
Lin Dong, Steven Hung, et al.
VLSI Technology 2021
Alex Hubbard, Christopher Carr, et al.
SPIE Advanced Lithography + Patterning 2026
Chun-chia Brown Lu, Saumya Gulati, et al.
ANS 2025