W. Lu, X.W. Wang, et al.
IEEE Electron Device Letters
In this letter, we present results of enhancement and depletion mode transistors fabricated on the same layer structure of Si/SiGe, without using gate recess. The current in the enhancement mode device is controlled by a pn-junction, while that of the depletion-mode device is controlled by a Schottky barrier. A peak transconductance of 327 mS/mm and 417 mS/mm has been achieved in 0.5-μm gate length depletion and enhancement-mode transistors, respectively.
W. Lu, X.W. Wang, et al.
IEEE Electron Device Letters
K. Ismail, B.S. Meyerson, et al.
Applied Physics Letters
P.M. Mooney, J.L. Jordan-Sweet, et al.
Applied Physics Letters
I. Lagnado, P.R. De La Houssaye, et al.
SiRF 2000